Domestic 32-bit AFE replaces ADS1283/ADS1284 for use in seismic detectors

In the fields of geological exploration, earthquake monitoring, energy development, etc., a seismic detector is an electromechanical device that converts ground or underwater seismic waves into electrical signals. Its main technical parameters include natural frequency, sensitivity, and distortion. After propagating through the geological layers, seismic wave signals experience significant amplitude attenuation, mostly in the form of weak signals at the microvolt level, accompanied by complex environmental noise and temperature drift interference. At the same time, detectors are often deployed in extreme outdoor environments and need to withstand a wide temperature range, humidity fluctuations, and mechanical vibrations. The requirements for noise performance, resolution, stability, and power consumption of analog-to-digital converters are high.

The working characteristics of GXSC 32-bit ultra-high resolution Δ - ∑ ADC perfectly match the signal acquisition requirements of seismic detectors. The chip includes a dual channel multiplexer, a low-noise programmable gain amplifier (PGA), a multi-stage ∑ - Δ modulator, and a digital filter combination. PIN TO PIN replacement of ADS1283/ADS1284 has become a core component for improving seismic exploration accuracy and environmental adaptability.

The GXSC AFE is a high-performance analog-to-digital converter device that can meet the stringent requirements of earthquake monitoring equipment. The dual channel multiplexer can be used for signal measurement and input switching of ADC testing signals. The signal testing mode can test the background noise of the chip through internal input short circuits, which facilitates equipment diagnosis during operation. PGA has the characteristics of high input impedance and low noise, and can be directly connected to seismic detectors and hydrophones.

In addition, this AFE has excellent noise, linearity, and distortion performance. The modulator output is filtered and extracted by an on-chip digital filter to generate sampled data output at a set rate. The digital filter provides data rates ranging from 250 to 4000 SPS. High pass filters (HPFs) have programmable transition frequencies and bypass modes. The on-chip gain and offset calibration registers support calibration of sampled data. The synchronous input pin controls the timing of ADC conversion, and turning off the input pin can put the ADC in shutdown power-saving mode.

Product feature introduction:

Interface: SPI

Programmable Differential Amplifier (PGA): 1-64 times voltage amplification factor

Digital power supply: 3.3V or 1.8V

Analog power supply: 5V or ± 2.5V

Ultra wide dynamic range: 130dB (250 SPS, PGA=1);

Ultra low total harmonic distortion: -119dB (PGA=1);

CMRR ≥ 110dB；

Low power consumption: 18mW, with flexible selection of high-performance modes;

Package: 5mm × 4mm VQFN (24 pins with 0.5mm spacing)

Rated operating temperature range: -40 ° C to+85 ° C

Maximum operating temperature range: -50 ° C to+125 ° C