GXSC ADC Comparable to the AD9245 for High-Sampling-Rate Industrial Control Applications

Modern industrial environments are characterized by rapid equipment start-up and shutdown, dynamic load fluctuations, and complex electromagnetic interference. Rapidly changing industrial parameters require high-speed, high-precision analog-to-digital conversion units to perform real-time quantification. Traditional industrial ADC solutions generally suffer from low sampling rates and insufficient resolution, making them unable to meet the demands of industrial applications requiring fast response times. This solution utilizes GXSC’s industrial-grade, high-performance 16-bit high-speed successive approximation ADC.

The GXSC ADC is a monolithic, single-supply, 14-bit ADC that includes a high-performance sample-and-hold amplifier and a voltage reference. Manufactured using CMOS technology and packaged in a plastic QFN32 package, it is a pin-to-pin replacement for the AD9245 and is widely used in communications, medical, and industrial applications.

The GXSC ADC employs a differential, multi-stage pipelined architecture with output error correction logic to provide 14-bit precision and ensure no lost counts across the entire temperature range. The wide-bandwidth, fully differential SHA allows for multiple selectable input ranges and a wide input common-mode range, including single-ended applications. It is suitable for multiplexing systems that switch between full-scale voltage levels across consecutive channels, as well as for sampling single-channel inputs at frequencies far exceeding the Nyquist rate.

GXSC ADC Product Advantages:

  Available in a plastic QFN32 package, compatible with the imported AD9245.

 Single-channel 20 MSPS/40 MSPS/65 MSPS/80 MSPS

Integrated on-chip voltage reference source and sample-and-hold circuit

Low power consumption: 210 mW @ 80 MSPS

Input signal swing: 1 Vpp–2 Vpp

Offset in binary or two’s complement data formats

On-chip duty cycle stabilization circuit

Flexible power-saving and power-down modes

 Static Performance: DNL: 0.5/+0.5 LSB, INL: 0.2/+2.0 LSB

 Differential analog input bandwidth: 500 MHz

 Dynamic Performance:

- fin = 5 MHz, ENOB = 11.3 bits, SNDR = 70.0 dB, SNR = 71.0 dB

- fin = 70 MHz, ENOB = 11.1 bits, SNDR = 69.0 dB, SNR = 69.5 dB

- fin = 100 MHz, ENOB = 10.7 bits, SNDR = 66.5 dB, SNR = 67.0 dB

The GXSC ADC’s single-ended clock input controls all internal conversion cycles. The duty cycle stabilization (DCS) circuit compensates for variations in the clock duty cycle while maintaining excellent overall ADC performance. Digital output data is represented in offset binary or two’s complement format. An out-of-range (OTR) signal indicates an input overflow; when combined with the most significant bit, it determines whether the overflow is low or high.